Instruction set of 8085 Microprocessor

   

 

 

Instruction Set Of 8085 Microprocessor

The 8085 Microprocessor has 74 basics and 246 total instruction.Each instruction has one byte opcode.Imstructions can be 1 byte,2 byte and 3byte.

1) 1 byte instruction has only an opcode.

2)While 2 byte instruction has an opcode followed by 8 bit (1-byte) data or address .

3)3-byte instruction has an opcode,followed by 16 bit(2-byte) data or address.

  ( While storing 3 byte instruction in memory the sequence of storage is first the opcode, followed by low- byte of data or address.)

The 8085 instruction set can be divided into five groups based on the nature of functions the instructions carry out:-

a)Data transfer Instructions

b)Arithmetic Instructions

c)Logical Instructions

d)Branching Instructions

e) Machine Control Instructions

The notation used in the instruction set are:-

Notation	Meaning
M	Memory location pointed by HL register pair
r	8 bit register
rp	16 bit register pair
rd	Destination register
addr	16 bit/8 bit address
()	content of

a) Data transfer Instructions:-

The data transfer instructions load the given data into register,and copy data from register to register,and copy data from register to memory and vice versa.

Condition flags are unaffected by any instruction in this group.This group consists of following Instruction.

  

	Instruction	Task performed
1.	MVI r,data(8 bit)	Move 8 bit immediate data to register r.

Sr.no	Mnemonics,operand	Opcode	Byte
1	MVI A,Data	3E	2
2	MVI B,Data	06	2
3	MVI C,Data	0E	2
4	MVI D,Data	16	2
5	MVI E,Data	1E	2
6	MVI H,Data	26	2
7	MVI L,Data	2E	2

	Instruction	Task performed
2.	MVI M,data(8 bit)	Move 8 bit immediate data to memory,whose address is in the HL register (Memory Pointer).

Sr.no	Mnemonics,operand	Opcode	Byte
1	MVI M,Data	36	2

	Instruction	Task performed
3.	MVI rd,rs	Move 8 bit immediate data from source register(rs) to distination register(rd).

Sr.no	Mnemonics,operand	Opcode	Byte
1	MOV A,A	7F	1
2	MOV A,B	78	1
3	MOV A,C	79	1
4	MOV A,D	7A	1
5	MOV A,E	7B	1
6	MOV A,H	7C	1
7	MOV A,L	7D	1
8	MOV B,A	47	1
9	MOV B,B	40	1
10	MOV B,C	41	1
11	MOV B,D	42	1
12	MOV B,E	43	1
13	MOV B,H	44	1
14	MOV B,L	45	1
15	MOV C,A	4F	1
16	MOV C,B	48	1
17	MOV C,C	49	1
18	MOV C,D	4A	1
19	MOV C,E	4B	1
20	MOV C,H	4C	1
21	MOV C,L	4D	1
22	MOV D,A	57	1
23	MOV D,B	50	1
24	MOV D,C	51	1
25	MOV D,D	52	1
26	MOV D,E	53	1
27	MOV D,H	54	1
28	MOV D,L	55	1
29	MOV E,A	5F	1
30	MOV E,B	58	1
31	MOV E,C	59	1
32	MOV E,D	5A	1
33	MOV E,E	5B	1
34	MOV E,H	5C	1
35	MOV E,L	5D	1
36	MOV H,A	67	1
37	MOV H,B	60	1
38	MOV H,C	61	1
39	MOV H,D	62	1
40	MOV H,E	63	1
41	MOV H,H	64	1
42	MOV H,L	65	1
43	MOV L,A	6F	1
44	MOV L,B	68	1
45	MOV L,C	69	1
46	MOV L,D	6A	1
47	MOV L,E	6B	1
48	MOV L,H	6C	1
49	MOV L,L	6D	1

	Instruction	Task performed
4.	MOV M,rs	Move 8 bit immediate from source register(rs) to memory whose address is in the memory pointer.

Sr.no	Mnemonics,operand	Opcode	Byte
1	MOV M,A	77	1
2	MOV M,B	70	1
3	MOV M,C	71	1
4	MOV M,D	72	1
5	MOV M,E	73	1
6	MOV M,H	74	1
7	MOV M,L	75	1

	Instruction	Task performed
5.	MOV rd,M	Move 8 bit data from memory whose address is in the memory pointer to destination register(rd).

Sr.no	Mnemonics,operand	Opcode	Byte
1	MOV A,M	7E	1
2	MOV B,M	46	1
3	MOV C,M	4E	1
4	MOV D,M	56	1
5	MOV E,M	5E	1
6	MOV H,M	66	1
7	MOV L,M	6E	1

	Instruction	Task performed
6.	LXI rp,Data 16 bit	Load 16 bit immediate data in the specified rp.

Sr.no	Mnemonics,operand	Opcode	Byte
1	LXI B	01	3
2	LXI D	11	3
3	LXI H	21	3
4	LXI SP	31	3

	Instruction	Task performed
7.	STA addr	Store the content of register A at the address given in the instruction.

Sr.no	Mnemonics,operand	Opcode	Byte
1	STA addr	32	3

	Instruction	Task performed
8.	LDA addr	Load data the into register A directly from the address given in the instruction.

Sr.no	Mnemonics,operand	Opcode	Byte
1	LDA addr	3A	3

	Instruction	Task performed
9.	SHLD addr	Store the content of HL register in the memory (addr)←L&(addr+1)←H.

Sr.no	Mnemonics,operand	Opcode	Byte
1	SHLD addr	22	3

	Instruction	Task performed
10.	LHLD addr	Load the content of memory into HL register (L)←(addr) & H←(addr+1).

Sr.no	Mnemonics,operand	Opcode	Byte
1	LHLD addr	2A	3

	Instruction	Task performed
11.	STAX rp	Store the content of the register A into the memory whose location is specified by BC or DE register pair.

Sr.no	Mnemonics,operand	Opcode	Byte
1	STAX B	02	1
2	STAX D	12	1

	Instruction	Task performed
12.	LDAX rp	Load the content of the memory whose location is specified by BC or DE register pair into register A.

Sr.no	Mnemonics,operand	Opcode	Byte
1	LDAX B	0A	1
2	LDAX D	1A	1

	Instruction	Task performed
13.	XCHG	Exchange the content of HL and DE register pair.

Sr.no	Mnemonics,operand	Opcode	Byte
1	XCHG	EB	1

Binary Coded Decimal(BCD)